Scalar Operation

Scalar operations handle single-value computations: address calculations, loop counters, control flow, and configuration of the CIM and Vector units. They operate on two register files:

• GRF (General Register File): 32 general-purpose registers ($0-$31) for arithmetic, addresses, and temporary values
• SRF (Special Register File): Configuration registers that control CIM array dimensions, vector lengths, and compute modes

Arithmetic

SC_RR

Performs an arithmetic or logical operation on two source registers and writes the result to a destination register.

SC_RI

Performs an operation using a register and an 11-bit signed immediate value (−1024 to 1023).

Memory

SC_LD

Loads a value from local memory into a general register using base+offset addressing.

SC_ST

Stores a register value to local memory using base+offset addressing.

Immediate Load

G_LI

Loads a 21-bit unsigned immediate (0 to 2,097,151) directly into a general register.

S_LI

Loads a 21-bit immediate into a special register. Used to configure CIM array and Vector unit parameters before compute operations.

Register Move

GS_MOV

Copies a value from a general register to a special register. Use when the configuration value is computed at runtime.

SG_MOV

Copies a value from a special register to a general register. Use to read configuration state or status values.

Examples

; Register-register operations (rd, rs, rt)
SC_ADD r3, r1, r2          ; r3 = r1 + r2
SC_SUB r5, r3, r4          ; r5 = r3 - r4
SC_MAX r6, r2, r3          ; r6 = max(r2, r3)
SC_EQ  r7, r1, r2          ; r7 = (r1 == r2)
SC_MUL r8, r4, r5          ; r8 = r4 * r5
SC_AND r9, r6, r7          ; r9 = r6 & r7

; Register-immediate operations (rd, rs, imm)
SC_ADDI r8, r8, -8         ; r8 = r8 - 8 (signed imm)
SC_SLLI r9, r9, 1          ; r9 = r9 << 1 (multiply by 2)
SC_ANDI r10, r10, 255      ; r10 = r10 & 0xFF (mask low 8 bits)
SC_ORI  r11, r11, 128      ; r11 = r11 | 0x80

; Base+offset memory access
G_LI   r1, 0x1000          ; Load base address into r1
SC_LD  r2, 0(r1)           ; r2 = MEM[r1 + 0]
SC_LD  r3, 4(r1)           ; r3 = MEM[r1 + 4]
SC_ST  r2, 64(r1)          ; MEM[r1 + 64] = r2
SC_ST  r0, -16(r1)         ; MEM[r1 - 16] = r0

; CIM / Vector configuration via SRF moves
S_LI   CIM_IBW, 8          ; CIM_IBW = 8
S_LI   CIM_OBW, 16         ; CIM_OBW = 16
G_LI   r10, 256            ; Compute value in GRF
GS_MOV CIM_AG, r10         ; CIM_AG = r10
SG_MOV r11, CIM_IBW        ; r11 = CIM_IBW (read back)