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Data Movement

Memory-to-memory data transfer instructions

Data movement instructions enable efficient data transfer between different memory units in the architecture, supporting bulk memory operations for array manipulation and data reorganization.


MEM_CPY

Performs a data transfer between memory units with flexible addressing modes. The instruction supports optional immediate offset addressing for both source and destination through opcode variants.

31:26
25:21
20:16
15:11
10:0
1100XY
opcode
rs
src base
rt
size
rd
dest base
imm
11-bit
Syntax
MEM_CPY rs, rt, rd, imm
Operation
MEM[dest_addr] ← MEM[src_addr] (GRF[rt] bytes)

Addressing Modes

The opcode bits X and Y control immediate offset addressing for source and destination:

Source Address (X bit)
X=0src_addr = GRF[rs]
X=1src_addr = GRF[rs] + imm
Destination Address (Y bit)
Y=0dest_addr = GRF[rd]
Y=1dest_addr = GRF[rd] + imm

Operation Flags

The MEM_CPY instruction uses optional flags to enable offset addressing for source and/or destination addresses:

SRC_OSource Offset
When set, adds immediate value to source address: src_addr = GRF[rs] + imm. Otherwise: src_addr = GRF[rs]
DST_ODestination Offset
When set, adds immediate value to destination address: dest_addr = GRF[rd] + imm. Otherwise: dest_addr = GRF[rd]

Flag Combinations:

FlagsOpcodeSource AddressDestination Address
(none)110000GRF[rs]GRF[rd]
DST_O110001GRF[rs]GRF[rd] + imm
SRC_O110010GRF[rs] + immGRF[rd]
SRC_O, DST_O110011GRF[rs] + immGRF[rd] + imm

The transfer size is specified in bytes via GRF[rt]. When both flags are set, the same immediate offset value is used for both source and destination addresses.


Examples

; Basic memory-to-memory copy (512 bytes)
G_LI  r1, 0x1000          ; Source base address
G_LI  r3, 0x2000          ; Destination base address
G_LI  r2, 512             ; Transfer size (bytes)
MEM_CPY r3, r1, r2, 0     ; Copy MEM[0x1000..0x11FF] → MEM[0x2000..0x21FF]

; Copy with destination immediate offset
G_LI  r1, 0x1000          ; Source base
G_LI  r3, 0x2000          ; Destination base
G_LI  r2, 256             ; Size
MEM_CPY r3, r1, r2, 1024, DST_O  ; Copy MEM[0x1000..0x10FF] → MEM[0x2400..0x24FF]

; Copy with both immediate offsets (buffer management)
G_LI  r1, 0x8000          ; Source buffer base
G_LI  r3, 0x9000          ; Destination buffer base
G_LI  r2, 128             ; Transfer 128 bytes
MEM_CPY r3, r1, r2, 1024, SRC_O, DST_O  ; Copy MEM[0x8400..0x8480) → MEM[0x9400..0x9480)

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